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| Voltage Regulators AN8017SA 1.8-volt 2-channel step-up DC-DC converter control IC I Overview The AN8017SA is a two-channel PWM DC-DC converter control IC that features low-voltage operation. This IC can obtain the step-up voltage with a small number of external components. The minimum operating voltage is as low as 1.8 V so that it can operate with two dry batteries. In addition, since it uses the 16-pin surface mounting type package with 0.65 mm pitch, it is suitable for a miniaturized highly efficient potable power supply. 5.00.2 16 9 (1.0) Unit: mm 4.40.2 6.40.3 0.15 -0.05 +0.10 0 to 10 0.50.2 0.65 (0.225) * Wide operating supply voltage range (1.8 V to 14 V) Seating plane 0.22 * Incorporating a high precision reference voltage circuit (allowance: 2%) SSOP016-P-0225A * Control in a wide output frequency range is possible (20 kHz to 1 MHz) * Built-in wideband error amplifier (single gain bandwidth: 10 MHz typical) * A built-in timer latch short-circuit protection circuit (charge current: 1.1 A typical) * Incorporating an under-voltage lock-out circuit (U.V.L.O.) (circuit operation-starting voltage: 1.67 V typical) * Dead-time is variable * Flatness of switching current can be obtained by staggering the turn-on timing of each channel * Built-in unlatch function When DT1 pin is low level or DT2 pin is high level, independent turn-off is possible. * Incorporating an on/off control function (active-high control input, standby mode current: 1 A maximum) * Parallel operation is possible * Totem pole output * Output source-current: -50 mA maximum (Constant current output with a less supply voltage fluctuation is possible by connecting an external resistor to pin 6 and pin 11) * Output sink-current: +80 mA maximum +0.10 - 0.05 I Applications * LCD displays, digital still cameras, and PDAs 0.10.1 I Features 1.20.2 1 8 Publication date: July 2001 SDH00007AEB 1 AN8017SA I Block Diagram VREF OSC DT1 VCC 1 9 Off FB1 IN-1 15 4 On/off control 1.19 V Reference voltage source VREF 16 VREF Triangular wave oscillation 0.9 V 0.2 V Unlatch1 U.V.L.O. H L Latch R Q S VREF PWM2 0.9 V Unlatch2 12 5 VCC 6 RB1 PWM1 7 Out1 3 Error amp.1 1.19 V 0.9 V VCC FB2 13 Error amp.2 11 RB2 S.C.P. comp. 0.22 V IN+2 14 10 Out2 1.19 V 0.9 V VREF 8 GND 2 I Pin Descriptions Pin No. Symbol 1 OSC Description Pin for connecting a oscillation timing resistor and capacitor 2 S.C.P. Pin for connecting the time constant setting capacitor for short-circuit protection 3 IN-1 Inverting input pin to error amplifier 1 block 4 5 6 FB1 DT1 RB1 Output pin of error amplifier 1 block PWM1 block dead-time setting pin Out1 block output source current setting resistor connection pin 7 Out1 Out1 block push-pull type output pin 15 16 Off VREF 12 13 14 DT2 FB2 IN+2 Pin No. Symbol 8 9 10 11 GND VCC Out2 RB2 Description Grounding pin Power supply voltage application pin Out2 block push-pull type output pin Out2 block output source current setting resistor connection pin PWM2 block dead-time setting pin Output pin of error amplifier 2 block Error amplifier 2 block noninverting input pin On/off control pin Reference voltage output pin 2 S.C.P. SDH00007AEB DT2 AN8017SA I Absolute Maximum Ratings Parameter Supply voltage Off terminal allowable application voltage IN-1 terminal allowable application voltage IN+2 terminal allowable application voltage Supply current Output source current Output sink current Power dissipation *1 *2 *2 Symbol VCC VOFF VIN-1 VIN+2 ICC ISO(OUT) ISI(OUT) PD Topr Tstg Rating 15 15 6 6 -50 +80 135 -30 to +85 -55 to +150 Unit V V V V mA mA mA mW C C Operating ambient temperature Storage temperature Note) 1. Do not apply external currents or voltages to any pins not specifically mentioned. For the circuit currents, '+' denotes current flowing into the IC, and '-' denotes current flowing out of the IC. 2. Except for the power dissipation, operating ambient temperature and storage temperature, all ratings are for Ta = 25C. 3. *1: Ta = 85 C. For the independent IC without a heat sink. Note that applications must observe the derating curve for the relationship between the IC power consumption and the ambient temperature. *2: VIN-1 , VIN+2 = VCC when VCC < 6 V. I Recommended Operating Range Parameter Supply voltage Off control terminal application voltage Output source current Output sink current Timing resistance Timing capacitance Oscillation frequency Short-circuit protection time constant setting capacitance Output current setting resistance Symbol VCC VOFF ISO(OUT) ISI(OUT) RT CT fOUT CSCP RB Range 1.8 to 14 0 to 14 -40 (minimum) 70 (maximum) 1 to 51 100 to 10 000 20 to 1 000 1 000 (minimum) 180 to 15 000 Unit V V mA mA k pF kHz pF I Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 F, Ta = 25C Parameter Reference voltage block Reference voltage Input regulation with input fluctuation Load regulation U.V.L.O. block Circuit operation start voltage VUON SDH00007AEB Symbol Conditions IREF = - 0.1 mA VCC = 1.8 V to 14 V IREF = - 0.1 mA to -1 mA Min Typ Max Unit VREF Line Load 1.166 -20 1.19 15 -5 1.214 30 V mV mV 1.59 1.67 1.75 V 3 AN8017SA I Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 F, Ta = 25C (continued) Parameter Error amplifier 1 block Input threshold voltage 1 Input bias current 1 High-level output voltage 1 Low-level output voltage 1 Output source current 1 Output sink current 1 Error amplifier 2 block Input threshold voltage 2 Input bias current 2 High-level output voltage 2 Low-level output voltage 2 Output source current 2 Output sink current 2 Oscillator block Output off threshold voltage Output 1 block Oscillation frequency 1 Output duty ratio 1 High-level output voltage 1 Low-level output voltage 1 Output source current 1 Output sink current 1 Pull-down resistance 1 Output 2 block Oscillation frequency 2 Output duty ratio 2 High-level output voltage 2 Low-level output voltage 2 Output source current 2 Output sink current 2 Pull-down resistance 2 PWM1 block Output full-off input threshold voltage 1 VT0-1 Duty = 0% Duty = 100% VDT1 = 0.5 V 0.65 -1.1 0.28 0.72 - 0.5 0.30 V V A fOUT2 Du2 VOH2 VOL2 IO = -10 mA, RB = 820 IO = 10 mA, RB = 820 RT = 12 k, CT = 330 pF 185 72 1.4 -40 20 20 205 77 -30 30 225 82 0.2 -20 40 kHz % V V mA mA k fOUT1 Du1 VOH1 VOL1 IO = -10 mA, RB = 820 IO = 10 mA, RB = 820 RT = 12 k, CT = 330 pF 185 73 1.4 -40 20 20 205 78 -30 30 225 83 0.2 -20 40 kHz % V V mA mA k VTH(OSC) 0.8 0.9 1.0 V VTH2 IB2 VEH2 VEL2 ISO(FB)2 ISI(FB)2 1.16 0.83 -61 33 1.19 0.2 0.93 -47 47 1.22 0.8 1.03 0.2 -33 61 V A V V A A VTH1 IB1 VEH1 VEL1 ISO(FB)1 ISI(FB)1 1.16 0.83 -61 33 1.19 0.2 0.93 -47 47 1.22 0.8 1.03 0.2 -33 61 V A V V A A Symbol Conditions Min Typ Max Unit ISO(OUT)1 VO = 0.7 V, RB = 820 ISI(OUT)1 VO = 0.7 V, RB = 820 RO1 ISO(OUT)2 VO = 0.7 V, RB = 820 ISI(OUT)2 VO = 0.7 V, RB = 820 RO2 Output full-on input threshold voltage 1 VT100-1 Input current 1 IDT1 4 SDH00007AEB AN8017SA I Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 F, Ta = 25 C (continued) Parameter PWM2 block Output full-off input threshold voltage 2 Output full-on input threshold voltage 2 Input current 2 Unlatch circuit 1 block Input threshold voltage 1 Unlatch circuit 2 block Input threshold voltage 2 Short-circuit protection circuit block Input standby voltage Input threshold voltage 1 Input threshold voltage 2 Input latch voltage Charge current On/off control block Input threshold voltage Whole device Output off consumption current Latch mode consumption current Standby current * Design reference data Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed. Symbol Conditions Duty = 0% Duty = 100% VDT2 = 0.2 V Min Typ Max 0.30 Unit VT0-2 VT100-2 IDT2 0.65 -1.1 0.72 0.28 - 0.5 V V A VTHUL1 0.15 0.20 0.25 V VTHUL2 VSTBY VTHPC1 VTHPC2 VIN ICHG VON(TH) RB = 820 , duty = 0% RB = 820 VSCP = 0 V 0.8 0.8 0.17 -1.43 0.8 0.9 1.0 V 60 0.9 0.22 60 120 1.0 0.27 120 mV V V mV A V -1.1 - 0.77 1.0 1.3 ICC(OFF) ICC(LA) ICC(SB) 7.0 5.6 9.8 7.8 1 mA mA A Parameter Reference voltage block VREF temperature characteristics Over-current protection drive current U.V.L.O. block Reset voltage Error amplifier 1/2 blocks VTH temperature characteristics Open-loop gain Single gain bandwidth Output 1/2 blocks RB terminal voltage Frequency supply voltage characteristics Frequency temperature characteristics Symbol Conditions Ta = -30C to +85C Min -1 Typ -11 Max +1 Unit VREFdT IOC % mA VR VTHdT AV fBW Ta = -30C to +85C 0.8 57 10 V - 0.3 -1 -3 + 0.3 mV/C +1 +3 dB MHz VB fdV fdT 0.36 V % % SDH00007AEB 5 AN8017SA I Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 F, Ta = 25C (continued) * Design reference data (continued) Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed. Parameter Short-circuit protection block Comparator threshold voltage On/off control block Off terminal current Symbol Conditions Min Typ Max Unit VTHL IOFF 1.19 V A 23 I Terminal Equivalent Circuits Pin No. 1 VCC Latch S Q R Equivalent circuit Description OSC: The terminal used for connecting a timing capacitor/resistor to set oscillation frequency. Use a capacitance value within the range of 100 pF to 10 000 pF and a resistance value within the range of 1 k to 51 k. Use an oscillation frequency in the range of 20 kHz to 1 MHz. In a parallel synchronous operation, the channel 2 output stops when this pin becomes 0.9 V or more. (Refer to the "Application Notes, [7]" section.) S.C.P.: The terminal for connecting a capacitor to set the time constant of the timer latch short-circuit protection circuit. Use a capacitance value in the range of 1 000 pF or more. The charge current ICHG is 1.1 A typical. I/O O 0.2 V 1 2 VCC 1.1 A 2 k Latch S Q R Output 1.19 V cut-off O 2 3 IN-1: The inverting input pin for error amplifier 1 block. I VCC 3 100 1.19 V 6 SDH00007AEB AN8017SA I Terminal Equivalent Circuits (continued) Pin No. 4 Equivalent circuit Description FB1: The output pin for error amplifier 1 block. The source current is -47 A and the sink current is 47 A. Correct the frequency characteristics of the gain and the phase by connecting a resistor and a capacitor between this terminal and GND. DT1: The pin for setting channel 1 output maximum duty ratio. If this terminal is set at a voltage of 0.20 V or less, FB1 terminal becomes low-level voltage and the protective function for channel 1 output short-circuit will stop (Unlatch function). RB1: The pin for connecting a resistor for setting channel 1 output current. Use a resistance value in the range of 180 to 15 k. The terminal voltage is 0.36 V (at RB1 = 820 ). 120 6 Out1 30 k I/O O VCC 47 A OSC 47 A 4 PWM IN-1 1.19 V 5 VCC FB1 OSC PWM I 0.20 V 5 6 VCC I 7 VCC RB1 ISO(OUT)1 7 30 k Out1: The pin is push-pull type output terminal. The absolute maximum ratings of output current are -50 mA for the source current and +80 mA for the sink current. A constant current output with less fluctuation with power supply voltage and dispersion can be obtained by the resistor externally attached to RB1 pin. VRB1 ISO(OUT)1 = 68 x [A] RB1 GND: Grounding terminal O 8 8 9 9 VCC: The supply voltage application terminal Use the operating supply voltage in the range of 1.8 V to 14 V. SDH00007AEB 7 AN8017SA I Terminal Equivalent Circuits (continued) Pin No. 10 VCC RB2 ISO(OUT)2 10 30 k Equivalent circuit Description Out2: The pin is push-pull type output terminal. The absolute maximum ratings of output current are -50 mA for the source current and +80 mA for the sink current. A constant current output with less fluctuation with power supply voltage and dispersion can be obtained by the resistor externally attached to RB2 pin. VRB2 ISO(OUT)2 = 68 x [A] RB2 RB2: The pin for connecting a resistor for setting channel 2 output current. Use a resistance value in the range of 180 to 15 k. The terminal voltage is 0.36 V (at RB2 = 820 ). I/O O 11 VCC I 120 11 12 VCC 0.9 V FB2 OSC Out2 30 k PWM 0.9 V DT2: The pin for setting channel 2 output maximum duty ratio. If this terminal is set at a voltage of 0.9 V or more, FB2 terminal becomes high-level voltage and the protective function for channel 2 output short-circuit will stop (Unlatch function). I 12 13 VCC 47 A OSC 47 A 13 PWM IN+2 1.19 V FB2: The output pin for error amplifier. The source current is -47 A and the sink current is 47 A. Correct the frequency characteristics of the gain and the phase by connecting a resistor and a capacitor between this terminal and GND. IN+2: The noninverting input pin for error amplifier 2 block. O 14 VCC I 14 100 1.19 V 8 SDH00007AEB AN8017SA I Terminal Equivalent Circuits (continued) Pin No. 15 Equivalent circuit Description Off: The terminal for on/off control. High-level input: Normal operation (VOFF > 1.3 V) Low-level input: Standby state (VOFF < 0.8 V) The total current consumption in the standby state can be suppressed to a value of 1 A or less. VREF: The output terminal for the internal reference voltage. The reference voltage is 1.19 V (allowance: 2%) at VCC = 2.4 V and IREF = - 0.1 mA. Connect a capacitor of 0.01 F or more between VREF and GND for phase compensation. I/O I Internal circuit start/stop 30 k 15 60 k 16 VCC O 16 I Usage Notes [1] The loss, P of this IC increases in proportion to the supply voltage. Use the IC so as not to exceed the allowable power dissipation of package, PD . Reference formula: P = (VCC - VBEQ1) x ISO(OUT)1 x Du1 + (VCC - VBEQ2) x ISO(OUT)2 x Du2 + VCC x ICC < PD VBEQ1 : Base-emitter voltage of npn transistor Q1 ISO(OUT)1 : Out1 terminal output source current (set by RB1, ISO(OUT)1 = 40 mA maximum at RB1 = 820 ) Du1 : Output1 duty ratio VBEQ2 : Base-emitter voltage of npn transistor Q2 ISO(OUT)2 : Out2 terminal output source current (set by RB2, ISO(OUT)2 = 40 mA maximum at RB2 = 820 ) Du2 : Output2 duty ratio ICC : VCC terminal current (8.0 mA maximum where VCC = 2.4 V) [2] Since the output 2 of the AN8017SA is assuming the bipolar transistor driving, it is necessary to pay attention to the following points when an n-channel MOSFET is driven directly. 1. Select an n-channel MOSFET having a low input capacitance The AN8017SA is of the constant current (50 mA maximum) output source current type circuit assuming the bipolar transistor driving. Also, its sink current capability is around 80 mA maximum. For those reason, it is necessary to pay attention to the increase of loss due to the extension of the output rise time and the output fall time. If any problem arises, there is a method to solve it by amplifying with inverters as shown in figure 1. SBD VIN VOUT Pins 7,10 Out Figure 1. Output bootstrap circuit example SDH00007AEB 9 AN8017SA I Usage Notes (continued) 2. Select an n-channel MOSFET having a low gate threshold value The high-level output voltage of out pin of the AN8017SA is VCC - 1.0 V minimum, so that it is necessary to select a low VT MOSFET having a sufficiently low on-state resistance in accordance with the using operating supply voltage. If a larger VGS is desired, there is a method to apply the double-voltage of the input to the IC's VCC pin by using the transformer as shown in figure 2. VIN SBD VOUT VCC 9 SBD Pins 7,10 Out VCC 2 x VIN - VD Figure 2. Gate drive voltage increasing method [3] In order to realize a low noise and high efficiency, care should be taken in the following points in designing the board layout. 1. The wiring for ground line should be taken as wide as possible and grounded separately from the power system. 2. The input filter capacitor should be arranged in a place as close to VCC and GND pin as possible so as not to allow switching noise to enter into the IC inside. 3. The wiring between the Out terminal and switching device (transistor or MOSFET) should be as short as possible to obtain a clean switching waveform. 4. In wiring the detection resistor of the output voltage, the wiring for the low impedance side should be longer. [4] There is a case in which this IC does not start charging to the S.C.P. capacitor when the output is short-circuited due to the malfunction of U.V.L.O. circuit biased by VCC that has ripples generated by turning on and off of the switching transistor. The allowable range of the VCC ripple is as shown in the following figure. Reduce the VCC ripple by inserting a capacitor near the VCC terminal and GND terminal of this IC so that the VCC ripple is in this allowable range. However, this allowable range is design reference value and not the guaranteed value. VCC ripple allowable range 100 VCC ripple frequency (MHz) 10 2 1 0.5 Recommended operating range 0.1 0 0.3 0.5 1 1.5 VCC ripple width (V[p-p]) 10 SDH00007AEB AN8017SA I Application Notes [1] PD Ta curves of SSOP016-P-0225A PD T a 700 600 582 Glass epoxy board (50 x 50 x t0.8 mm3) Rth(j-a) = 171.8C/W Power dissipation PD (mW) 500 400 338 300 233 200 135 100 Independent IC without a heat sink Rth(j-a) = 295.6C/W 0 0 25 50 75 85 100 125 Ambient temperature Ta (C) [2] Main characteristics VREF temperature characteristics 1.195 1M Frequency characteristics CT = 100 pF CT = 330 pF VREF (V) 1.190 fOUT (Hz) 100k CT = 0.01 F 1.185 -30 -10 10k 10 30 50 70 90 1k 10k 100k Ta (C) RT () SDH00007AEB 11 AN8017SA I Application Notes (continued) [2] Main characteristics (continued) ISO(OUT) RB 70 60 VCC = 2.4 V 50 60 VCC = 14 V 90 80 70 VCC = 14 V ISI(OUT) RB ISO(OUT) (mA) 40 30 VCC = 1.8 V 20 ISI(OUT) (mA) VCC = 2.4 V 50 40 30 20 VCC = 1.8 V VCC = 7 V VCC = 7 V 10 0 100 10 0 100 1k 10k 100k 1k 10k 100k RB () RB () Du1 VDT1 100 90 80 70 100 90 80 70 Du2 VDT2 Du1 (%) 50 40 30 20 10 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Du2 (%) 60 60 50 40 30 20 10 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 VDT1 (V) VDT2 (V) ICC(OFF) VCC 9 8 7 6 20 18 16 14 ICC(OFF) RB ICC(OFF) (mA) ICC(OFF) (mA) 0 2 4 6 8 10 12 14 12 10 8 6 4 2 0 100 1k 10k 5 4 3 2 1 0 VCC (V) RB () 12 SDH00007AEB AN8017SA I Application Notes (continued) [3] Timing chart VCC terminal voltage waveform 1.6 V 1.22 V Output short-circuit S.C.P. terminal voltage waveform FB1 Channel 1 OSC DT1 Out1 terminal voltage waveform Channel 2 FB2 OSC DT2 Out2 terminal voltage waveform SDH00007AEB 13 AN8017SA I Application Notes (continued) [4] Function descriptions 1. Reference voltage block This block is composed of the band gap circuit, and outputs the temperature compensated 1.19 V reference voltage. The reference voltage is stabilized when the supply voltage is 1.8 V or more. The reference voltage is also used as the reference voltage for the error amplifier 1 block and the error amplifier 2 block. 2. Triangular wave oscillation block The sawtooth-waveform-like triangular wave having a peak of approximately 0.7 V and a trough of approximately 0.2 V can be generated by connecting the timing capacitor and resistor to the OSC terminal (pin 1). The oscillation frequency can be freely set by the value of CT and RT to be connected externally. The usable oscillation frequency is from 20 kHz to the maximum 1 MHz. The triangular wave is connected with the inverting input of PWM comparator for channel 1 side and the noninverting input of PWM comparator for channel 2 side within the IC inside. And refer to the experimentally determined graph of the frequency characteristics provided in the main characteristics section. 3. Error amplifier 1 block The output voltage of DC-DC converter is detected by the npn-transistor-input type error amplifier and the amplified signal is input to the PWM comparator. The internal reference voltage 1.19 V is given to the noninverting input. Also, it is possible to perform the gain setting and the phase compensation arbitrarily by connecting a resistor and a capacitor from the FB1 terminal (pin 4) to GND in series. The output voltage VOUT1 can be set by making connection as shown in figure 2. 4. Error amplifier 2 block The output voltage of DC-DC converter is detected by the npn-transistor-input type error-amplifier and the amplified signal is input to the PWM comparator. The internal reference voltage 1.19 V is given to the noninverting input. Also, it is possible to perform the gain setting and the phase compensation arbitrarily by connecting a resistor and a capacitor from the FB2 terminal (pin 13) to GND in series. The output voltage VOUT2 can be set by making connection as shown in figure 3. VOSCH 0.75 V VOSCL 0.2 V t1 Quick charging t2 Discharging T Figure 1. Tiangular wave oscillation waveform VOUT1 R1 R2 FB1 4 Error amplifier 1 block 1.19 V VOUT1 = 1.19 x To PWM comparator input IN-1 3 R1 + R2 R2 Figure 2. Connection method of error ampifier 1 block (Step-up output) VOUT2 R1 R2 FB2 13 Error amplifier 2 block 1.19 V VOUT2 = 1.19 x To PWM comparator input IN+2 14 R1 + R2 R2 Figure 3. Connection method of error ampifier 2 block (Step-up output) 14 SDH00007AEB AN8017SA I Application Notes (continued) [4] Function descriptions (continued) 5. Timer latch short-circuit protection circuit This circuit protects the external main switching devices, flywheel diodes, and choke coils, etc. from destruction or deterioration if overload or short-circuit condition of power supply output lasts for a certain time. The timer latch short-circuit protection circuit detects the output level of the error amplifier. When the output voltage of DC-DC converter drops and the output level of error amplifier 1 block exceeds 0.9 V or the output level of error amplifier 2 block exceeds 0.22 V, the low-level output is given and the timer circuit is actuated to start the charge of the external protection-enable capacitor. If the output of the error amplifier does not return to a normal voltage range by the time when the voltage of this capacitor reaches 1.22 V, it sets the latch circuit, and cuts off the output drive transistor, and sets the dead-time to 100%. 6. Low input voltage malfunction prevention circuit (U.V.L.O.) This circuit protects the system from destruction or deterioration due to control malfunction when the supply voltage is low in the transient state of power on/off. The low input voltage malfunction prevention circuit detects the internal reference voltage which changes according to the supply voltage level. Until the supply voltage reaches 1.67 V during its rise time, it cuts off the output drive transistor, and sets the dead-time to 100%. At the same time, it holds the S.C.P. terminal (pin 2) and DT1 terminal (pin 5) to low-level and the OSC terminal (pin 1) and DT2 terminal (pin 12) to high-level. 7. PWM comparator block The PWM comparator controls the on-period of the output pulse according to the input voltage. The PWM1 and PWM2 block are reverse logic relation. The PWM1 block turns on the output transistor during the period when the triangular wave of OSC terminal (pin 1) is lower than any lower one of the FB1 (pin 4) terminal voltage and the DT1 (pin 5) terminal voltage. The PWM2 block turns on the output transistor during the period when the triangular wave of OSC terminal (pin 1) is higher than any higher one of the FB2 (pin 13) terminal voltage and the DT2 (pin 12) terminal voltage. The maximum duty ratio is variable from the outside. Also, the soft start which gradually extends on-period of the output pulse is activated by connecting a capacitor in parallel with the resistor-dividing for the maximum duty ratio setting. 8. Unlatch block The unlatch circuit 1 block fixes the FB1 terminal (pin 4) at low-level at the DT1 terminal (pin 5) is 0.20 V or less. The unlatch circuit 2 block fixes the FB2 terminal (pin 13) at high-level at the DT2 terminal (pin 12) is 0.9 V or less. Consequently, by controlling the DT terminal voltage, it is possible to operate only one channel or to start and stop each channel in any required sequence. 9. Output 1 block This block uses a totem pole type output circuit. By connecting the current setting resistor to the RB1 terminal, it is possible to arbitrarily set a constant-current source-output having a small fluctuation with the supply voltage. The available constant-current source-output is up to 50 mA. The breakdown voltage of output terminal is 15 V. 10. Output 2 block This block uses a totem pole type output circuit. By connecting the current setting resistor to the RB2 terminal, it is possible to arbitrarily set a constant-current source-output having a small fluctuation with the supply voltage. The available constant-current source-output is up to 50 mA. The breakdown voltage of output terminal is 15 V. SDH00007AEB 15 AN8017SA I Application Notes (continued) [5] About logic of PWM block The logic for channel 1 and channel 2 of this IC is reversed. Thereby an input current flatness is realized. At the same time, noise can be suppressed to a lower level by staggering the turn on timing. The PWM1 block turns on the output transistor during the period when the triangular wave of the OSC terminal (pin 1) is lower than both of the FB1 (pin 4) terminal voltage and the DT1 (pin 5) terminal voltage. The PWM2 block turns on the output transistor during the period when the triangular wave of the OSC terminal (pin 1) is higher than both of the FB2 (pin 13) terminal voltage and the DT2 (pin 12) terminal voltage. (Refer to figure 4.) OSC FB1 FB2 DT1 and DT2 are omitted. Out1 (totem pole output) Out2 (totem pole output) Channel 1 Switching transistor collector current IC1 Channel 2 Switching transistor collector current IC2 IC1 + IC2 SBD VIN + IC2 10 Out2 SBD Out1 7 + IC1 Figure 4. PWM logic explanation chart 16 SDH00007AEB AN8017SA I Application Notes (continued) [6] Time constant setting method for timer latch short-circuit protection circuit The constructional block diagram of protection latch circuit is shown in figure 6. The comparator for short-circuit protection compares the error amplifier 1 output FB1 with the reference voltage of 0.9 V for channel 1 side, and the error amplifier 2 output FB2 with the reference voltage of 0.18 V for channel 2 side at all the time. When the load conditions of DC-DC converter output is stabilized, there is no fluctuation of error amplifier output and the short-circuit protection comparator also keeps the balance. At this moment, the output transistor Q1 is in the conductive state and the S.C.P. terminal is held to approximately 60 mV. When the load conditions for channel 1 side suddenly change and high-level signal (0.9 V or more) is input from the error amplifier 1 block to the short-circuit protection comparator, the short-circuit protection comparator outputs the low-level signal to cut off the output transistor Q1. Also, when the load conditions for channel 2 side suddenly change and low-level signal (0.22 V or less) is inputted from the error amplifier 2 block to the short-circuit protection comparator, the short-circuit protection comparator outputs the low-level signal to cut off the output transistor Q1. The capacitor CSCP connected to the S.C.P. terminal starts charging. When the external capacitor CSCP has been charged to approximately 1.19 V with the constant current of approximately 1.1 A, the latch circuit is set, the output terminal is fixed to low-level, and the dead-time is set to 100%. Once the latch circuit is set, the S.C.P. terminal is discharged to approximately 40 mV. However, the latch circuit is not reset unless the power for the latch circuit is turned off or restarted by the on/off control. tPE VSCP [V] 1.19 V = ICHG x CSCP tPE [s] = 1.08 x CSCP When the power supply is turned on, the output is considered to be short-circuited state so that the S.C.P. terminal voltage starts charging. It is necessary to set the external capacitor so as to start up the DC-DC converter output voltage before setting the latch circuit in the later stage. Especially, pay attention to the delay of the start-up time when applying the soft-start. 1.22 Short-circuit detection time tPE 0.06 t [s] Figure 5. S.C.P. terminal charging waveform FB1 IN-1 4 3 On/off control U.V.L.O. Error amp.1 1.1 A 1.22 V 0.9 V Error amp.2 1.22 V 0.18 V S.C.P. comp. Q1 Latch R S Q Internal reference FB2 IN+2 13 14 Output cut-off High-level detection comp. 1.19 V Figure 6. Short-circuit protection circuit S.C.P. 2 SDH00007AEB 17 AN8017SA I Application Notes (continued) [7] Parallel synchronous operation of multiple ICs Multiple instances of this IC can be operated in parallel. If the OSC terminals (pin 1) and Off terminals (pin 15) are connected to each other as shown in figure 7, the ICs will operate at the same frequency. It is possible to operate this IC (the AN8017SA) with the two-channel 1.8-volt DC-DC converter control IC AN8018SA (open-collector output/each single-channel totem pole output) in parallel synchronous mode. 1. Usage notes 1) The parallel synchronous operation with the single-channel 1.8-volt DC-DC converter control IC AN8016SH/ AN8016NSH is not possible. 2) The remote on/off with the single IC itself is not possible. Only the simultaneous remote on/off of all ICs is possible. H 0.1 F 16 VREF L Input IN+2 11 RB2 Out2 7 Out2 7 Out1 10 Out1 10 DT2 13 FB2 15 Off 9 VCC GND 8 9 VCC GND 8 14 Off terminals connected together OSC 1 S.C.P. 2 3 FB1 4 5 DT1 5 DT1 12 DT2 RB1 6 RB1 6 11 RB2 0.1 F 16 VREF IN+2 13 FB2 FB1 4 15 Off OSC terminals connected together OSC 1 S.C.P. 2 3 Figure 7. Slave operation circuit example 18 SDH00007AEB IN-1 14 IN-1 12 AN8017SA I Application Notes (continued) [7] Parallel synchronous operation of multiple ICs (continued) 2. About the operation of short-circuit protection at parallel synchronous operation In the case of the operation in parallel, if the single output (or multiple outputs) of them is short-circuited and the timer latch is applied to the IC which has that output, the output of other ICs will be also shut down. In figure 8, if the timer latch is applied to IC-2, Q1 turns on and the OSC terminal (pin 1) is raised to approximately 1.1 V. Then channel 1 of IC-1 logically turns off, and then for channel 2, the output of comparator whose reference voltage is 0.9 V becomes high-voltage and Out2 is forced to go off. The same goes with the case when the timer latch is applied to IC-1. 16 IC-1 0.9 V Channel 2 goes off at high Oscillator high-level detection comparator 16 1 IC-2 Q1 When short-circuit protection function is actuated to apply latch, Q1 turns on and, VOSC = VREF - VCE(sat) becomes approximately 1.1 V 1 IC-2 side output short-circuited IC-2 latch 1.19 V IC-1 latch S.C.P. OSC DT1 FB1 Since the OSC terminal voltage becomes higher than the DT1 terminal voltage, the Out1 becomes fully off state. Out1 OSC FB2 DT2 Out2 1.19 V S.C.P. Figure 8. Operation of short-circuit protection at parallel synchronous operation Forced to be in off state inside the IC SDH00007AEB 19 AN8017SA I Application Notes (continued) [8] Setting of Off-terminal connection resistor The start circuit starts its operation when Q1 is turned on. In an organization in which Q1 turns off/on when Q2 turns on/off in figure 9, the input voltage VIN at which the start circuit operates is obtained by the equation: VIN = VBEQ1 x (ROFF + R1 + R2) / R2 ROFF Therefore, ROFF can be set by: Off 15 ROFF = R2 * VIN / VBEQ1 - R1 - R2 Start circuit Also, in case of limiting the Off terminal current by ROFF , R1 set it by the above equation. However, take the values as: 30 k Q2 Q1 VBEQ1 = 0.7 V (T = 25C) R2 VBEQ1 fluctuation with temperature: -2 mV/C 60 k Temperature coefficient of R1 and R2: +6 000 PPM/C Figure 9. Off terminal peripheral circuit [9] Sequential operation It is possible to turn on/off the output of DC-DC converter individually by turning on/off Q1 and Q2 as shown in figure 10. However, pay particular attention to the current flowing into the VREF terminal when Q2 is turned off since sink capability of VREF terminal is approximately 100 A. 0.1 F Q2 16 VREF 10 Out2 Out1 7 11 RB2 12 DT2 13 FB2 Unlatch2 0.9 V 0.9 V Unlatch1 0.2 V FB1 4 DT1 5 RB1 6 1.19 V GND 8 9 VCC V2 Control block V1 Q1 Figure 10 20 SDH00007AEB AN8017SA I Application Notes (continued) [9] Sequence operation (continued) V1 V2 DT1 Out1 DT2 Out2 Out1 operation Out2 operation Out1: Off at DT1 < 0.2 V Out2: Off at DT2 > 0.9 V Operation when each channel is turned on/off independently [10] Error amplifier phase-compensation setting method The equivalent circuit of error amplifier is shown in figure 11. The transfer function is: H= 1 / {S (CE1 + CO1)} 1 = RE1 + 1 / {S (CE1 + CO1)} SCO1 * RE1 + 1 (from CE1 << CO1) The cut-off frequency is variable by changing the externally attached phase compensation capacitor CO1 . Adjust by inserting a resistor RO1 between the FB1 terminal and CO1 in series as shown in figure 12 when it is required to have a gain on the high frequency side or desired to lead a phase. The transfer function is: H= SCO1 * RO1 + 1 SCO1 (RO1 + RE1) + 1 (from CE1 << CO1) IN-1 RE1 1 M 57dB To PWM IN-1 RE1 1 M 57dB To PWM 1.19 V CE1 5 pF FB1 1.19 V CE1 5 pF FB1 CO1 RO1 CO1 Figure 11. Error amplifier equivalent circuit Figure 12. Error amplifier equivalent circuit (RO1 inserted) SDH00007AEB 21 AN8017SA I AC Analysis Result * Simulation circuit IN-1 AC 1.19 V FB1 RO1 CO1 f Phase 180 RO1 = 10 k 160 140 120 f Phase 180 160 1 k 100 10 1 RO1 = 10 k 140 120 1 k 100 10 Phase ( ) Phase ( ) 100 80 60 CO1 = 0.01 F 40 20 0 1 10 100 1k 10k 100k 100 80 60 CO1 = 1 000 pF 40 20 0 1 1M 10M 100M 1 10 100 1k 10k 100k 1M 10M 100M f (Hz) f (Hz) f Gain 60 CO1 = 0.01 F 40 RO1 = 10 k 20 20 40 60 f Gain CO1 = 1 000 pF RO1 = 10 k Gain (dB) 0 -20 -40 -60 -80 Gain (dB) 1 k 100 10 0 -20 -40 1 k 100 10 1 1 -60 -80 1 10 100 1k 10k 100k 1M 10M 100M 1 10 100 1k 10k 100k 1M 10M 100M f (Hz) f (Hz) 22 SDH00007AEB AN8017SA I AC Analysis Result (continued) f Phase 180 RO1 = 0 160 0.001 F 140 120 0.01 F 140 120 160 RO1 = 10 k 1 k 100 10 1 180 f Phase Phase ( ) Phase ( ) 0.1F 100 80 60 40 20 0 1 10 100 1k 10k 100k 1M 10M 100M CO1 = 1 F 100 80 60 CO1 = 0.1 F 40 20 0 1 10 100 1k 10k 100k 1M 10M 100M f (Hz) f (Hz) f Gain 60 RO1 = 0 40 0.001 F 20 0.01 0.1 F F 40 20 60 f Gain CO1 = 0.1 F RO1 = 10 k Gain (dB) 0 -20 -40 -60 -80 CO1 = 1 F Gain (dB) 0 -20 -40 -60 -80 1 k 100 10 1 1 10 100 1k 10k 100k 1M 10M 100M 1 10 100 1k 10k 100k 1M 10M 100M f (Hz) f (Hz) SDH00007AEB 23 AN8017SA I Application Circuit Examples * Application circuit example 1 Input R9 C8 C6 CTL R12 C7 R8 Q2 RB2 C9 R13 - R10 C11 C10 L2 SBD2 Output2 + 16 VREF 14 IN+2 10 Out2 Out1 7 11 RB2 12 DT2 OSC 1 S.C.P. 2 IN-1 3 FB1 4 13 FB2 15 Off AN8017SA DT1 5 RB1 6 GND 8 9 VCC C1 R1 C2 R2 C3 L1 SBD1 Output1 + R6 R5 Q1 C5 R3 R4 C4 R7 - * Evaluation board VIN AN8017SA VO2 R11 R13 R12 Q2 SBO2 GND L2 R10 C11 C6 L1 Q1 C10 R9 C8 R8 C7 On SW1 Off SBO1 C5 C4 VO1 R5 R4 R3 R2 C3 R6 R7 C2 R1 C1 24 SDH00007AEB AN8017SA I Application Circuit Examples (continued) * Application circuit example 2 (Circuit using the AN8017SA/AN8018SA) Input voltage range: 1.8 V to 3.2 V Oscillation frequency: 450 kHz 68 k 0.1 F 0.1 F 0.1 F Input 1.8 V to 3.2 V 22 k 10 H MA2Q738 (MA738*) 820 10 Out2 11 RB2 9 VCC 2SD0874 (2SD874*) 10 F 5 V (STBY) 300 mA (max.) 39 k 12 k 14 IN+2 16 VREF 10 k 1.19 V OSC 1 S.C.P. 2 IN+1 3 AN8018SA IN-1 4 FB1 5 DT1 6 Out1 7 GND 8 -10 V MA2Q738 10 mA (MA738*) (max.) 2SB1440 12 DT2 13 FB2 15 Off 10 k 0.1 F 5.1 k 300 68 H 10 F 330 pF 1.5 k 22 k 68 k 75 k 47 k 75 k 0.1 F 68 k 1.19 V 0.1 F 0.1 F 22 k MA2Q738 10 H (MA738*) 0.1 F 5V 140 mA (max.) 51 k 15 k 14 IN+2 16 VREF 10 k 820 10 Out2 11 RB2 9 VCC 12 DT2 13 FB2 15 Off 2SD0602 (2SD602*) 10 F OSC 1 S.C.P. 2 IN-1 3 DT1 5 RB1 6 Out1 7 GND 8 Remote on/off control pin -10 V, 5 V, 18 V stop with high-level input. AN8017SA FB1 4 MA2Q738 18 H (MA738 *) 18 V 35 mA (max.) 56 k 2SD0602 (2SD602*) 10 F 3.9 k 10 k 0.1 F 820 56 k 68 k 0.1 F Note) *: Former part number SDH00007AEB 25 |
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